The original IOM-MPF-1P board is the same size as the MPF-I-P, filling the whole left side of the case. As half of the board is room for experimentation, it is left out of the recreation. This allows the user to create several extensions, which can be exchanged. Another reason to skip this part is that smaller board are cheaper to produce.
The board contains several sub-systems, which are mostly independent:
The I/O part consists of the Z80-PIO and Z80-CTC chip that were part of the earlierMPF-I, but not present on the MPF-I-P. The standard ROM on the board has some simple routines demonstrating the chips.
Another minor part of the I/O section are the eight DIP-switches
The I/O-map is:
The LEDs are default not connected to any I/O-pins, but can be patched via the J23 connector. They are buffered, and are on when a low level is applied.
The serial port is a P8251A UART chip capable of asynchronous (and some form of synchronous communication. The BAUD rate is derived from the Z80-CTC, timer 2.
The recreation allows for using direct TTL-level signals and the regular RS-232C signal levels.
The Memory section consists of one 4 kByte ROM socket (at address range Axxxh or Bxxx) and three 2 kByte RAM sockets, each switchable between the C0xxh-D7xxh and D8xxh-EFxxh ranges.
The default ROM contains demo routines for the I/O and serial chips.
The board is not for sale, but the KiCAD design files and monitor code (assembly and code) are free for download.
The current board is created late 2022 and has number of flaws. For some reason a newer board never was created. Below are the fixes:
Fixes for IOM-MPF-1P remake revision 1.0: - The DIP-switch buffer U11, 74LS244 is activated on /WR, this should be /RD. - Cut trace from U9-2 (solder side), - Add wire from U9-2 to U13-13 - I/O-selectlogic is incorrect. The selector should be active if: A5 & A6 high, A7 low, /M1 high and /IORQ low. - cut GND trace to U8-12 and -13 (these to are connected at component side) - cut /IORQ trace to U9-4 - cut /M1 trace to U9-5 - cut (/IORQ + /M1) trace between U9-6 and U16-4 - cut A7 trace to U16-5 - add wire between IC1-14 and U8-12 (/M1) - add wire between U8-11 and U9-5 (M1) - add wire between IC1-10 and U16-4 (/IORQ) - add wire between U5-1 and U9-4 (A7) - add wire between U9-6 and U16-4 (A7 + M1) - LED drivers should be pull-up, not pull-down. - lift from resistors R5, R7, R9 and R11 the end facing away from the trasnsistors, - connect the open end of R5, R7, R9 and R11 to a wire and connect to +5V, for instance the far end of C16. - The LEDs are connected to PB4 to PB7 (as per schematic) but should be connected to PA0-PA3 (as per ROM program). - cut traces from J23 1, 3, 5, 7 on both sides, connecting the traces from the PIO-B-31/34 to J4-5/8 to restore PIO-B connection to J4 header - add wire from J23-1 to U15-15 - add wire from J23-3 to U15-14 - add wire from J23-5 to U15-13 - add wire from J23-7 to U15-12 An alternative to this is not using J23, but J5. - jumper wire from J5-1 to J23-6 (green) - jumper wire from J5-2 to J23-4 (yellow) - jumper wire from J5-3 to J23-2 (red) - jumper wire from J5-4 to J23-8 (blue, optional) - The /WR pin of the RAMs isn't connected to P1/P11 connector. - add wire from U13-10 to U5-21 - The J3 CTC header is missing a number of signals from the Z80-CTC: - 1 CLK/TR0 IC1-23 - 2 CLK/TR1 IC1-22 - 6 TR1 IC1- - 7 TR2 - 8 TR3 - 11 CLK/TR2
The IOM-MPF-1P can be used as a basis of several useful additions to the MPF-1P system. Some I thought of, but never finished or even made:
Last updated: 2024-07-19