The SGB VID2 KIM is a ECB-bus card with a Nec7220D controller and 128kByte RAM. The complete board has operated in a ECB expansion system for the TRS-80 model 1.
There are two boards, one completely populated and probably operational, another partly populated. The boards are not the same in layout and used components. The incomplete board has L001 as marking, the complete board has a marking ending with 02. Because this board seems older than the L001, I refer to it as L000.
The board I first investigated was the L001. Here is the layout with added IC numbering. Because of the IC-sockets, the mask is only partially readable, so I had to add unique IDs.
The diagram is only partial, as it omits both the 7220 and the RAM. Not all ICs are present, but the same are assumed as on the L000 board. For most ICs this result in a likely diagram, but it breaks down at IC U1H. The connections are not sane for a 74LS157, is another IC should be there.
The result of the L000 reverse engineering. Keeping the same component IDs as for the L0001 board. I was somewhat surprised to find a 74LS00 at U1A. The circuit is the same as for the L001 board, so the IC must be wrong.
J12 is the intended connector for video & sync out, but a proper video amplifier stage is missing. In this instance this was solved by piggy-backing U19 with a 74LS125 as buffer (and not a very neat job either). The result is connected to a DIN-connector.
So to summarize the connectors, J12 is unbuffered output, J2 and J3 are sync pulse polarity. J5 is bypassed by a patch, its original purpose unclear. J14 are the address lines from the 7220. J6 to J11 are other DRAM related signals.
To test the board I needed acomputer with an ECB bus. The original that came woth the board, a Radio Shack model 1 was not in operational order, certainly if one want to be able to store programs comfortable.
An alternative is to create a basic ECB interface for another system. Only IO was needed, and most programs are for the 8080/Z80, so I choose an Epson PX-8. This is the (passive) interface:
| PX-8 bus | signal | ECB bus | |
|---|---|---|---|
| 5 | A1 | C7 |  |
| 6 | A2 | A6 | |
| 8 | A0 | C5 | |
| 9 | A4 | A7 | |
| 10 | A3 | C6 | |
| 11 | A6 | A9 | |
| 12 | A5 | A8 | |
| 14 | A7 | C9 | |
| 17 | D0 | C2 | |
| 18 | D1 | C14 | |
| 19 | D2 | C4 | |
| 20 | D3 | A4 | |
| 21 | D4 | A5 | |
| 22 | D5 | A2 | |
| 23 | D6 | A3 | |
| 24 | D7 | C3 | |
| 31 | GND | A32 | |
| 32 | GND | C32 | |
| 33 | RESET* | C31 | |
| 35 | RD* | C24 | |
| 37 | WR* | C22 | |
| 40 | IORQ* | A27 |
signals marked with a * are active low
A first test in BASIC indicates the board is properly addressed. Having neither configuration software on the machine nor usable graphics output present, halts this phase for now.
The board designers thought a four-pin TTL level header at the wrong side of the board would be sufficient. The original owner improved on this by adding buffers and a proper connector.
Instead of making another special cable for a special monitor, I will reproduce the N8VEM VGA monitor interface.
More information on the uPD7220 at the Epson QX-10 documentation page.
Latest update: 2010-04-30
